NAME_TABLE:

C_Function_Name: cm_d_osc

Spice_Model_Name: d_osc

Description: "controlled digital oscillator"

PORT_TABLE:

Port Name: cntl_in out

Description: "control input" "output"

Direction: in out

Default_Type: v d

Allowed_Types: [v,vd,i,id] [d]

Vector: no no

Vector_Bounds: - -

Null_Allowed: no no

PARAMETER_TABLE:

Parameter_Name: cntl_array freq_array

Description: "control array" "frequency array"

Data_Type: real real

Default_Value: 0.0 1.0e6

Limits: - [0 -]

Vector: yes yes

Vector_Bounds: [2 -] cntl_array

Null_Allowed: no no

PARAMETER_TABLE:

Parameter_Name: duty_cycle init_phase

Description: "duty cycle" "initial phase of output"

Data_Type: real real

Default_Value: 0.5 0

Limits: [1e-6 0.999999] [-180.0 +360.0]

Vector: no no

Vector_Bounds: - -

Null_Allowed: yes yes

PARAMETER_TABLE:

Parameter_Name: rise_delay fall_delay

Description: "rise delay" "fall delay"

Data_Type: real real

Default_Value: 1e-9 1e-9

Limits: [0 -] [0 -]

Vector: no no

Vector_Bounds: - -

Null_Allowed: yes yes

• Description:
  The digital oscillator is a hybrid model that accepts as input a voltage or current. This input is compared to the voltage-to-frequency transfer characteristic specified by the cntl_array/freq_array coordinate pairs, and a frequency is obtained that represents a linear interpolation or extrapolation based on those pairs. A digital time-varying signal is then produced with this fundamental frequency.
  The output waveform, which is the equivalent of a digital clock signal, has rise and fall delays that can be specified independently. In addition, the duty cycle and the phase of the waveform are also variable and can be set by you.

Example SPICE Usage:

a5 1 8 var_clock

.model var_clock d_osc(cntl_array = [-2 -1 1 2]

+ freq_array = [1e3 1e3 10e3 10e3]

+ duty_cycle = 0.4 init_phase = 180.0

+ rise_delay = 10e-9 fall_delay=8e-9)