NAME_TABLE:

C_Function_Name: cm_d_genlut

Spice_Model_Name: d_genlut

Description: "digital n-input x m-output look-up table gate"

PORT_TABLE:

Port_Name: in out

Description: "input" "output"

Direction: in out

Default_Type: d d

Allowed_Types: [d] [d]

Vector: yes yes

Vector_Bounds: - -

Null_Allowed: no no

PARAMETER_TABLE:

Parameter_Name: rise_delay fall_delay

Description: "rise delay" "fall delay"

Data_Type: real real

Default_Value: 1.0e-9 1.0e-9

Limits: [1.0e-12 -] [1.0e-12 -]

Vector: yes yes

Vector_Bounds: - -

Null_Allowed: yes yes

PARAMETER_TABLE:

Parameter_Name: input_load input_delay

Description: "input load value (F)" "input delay"

Data_Type: real real

Default_Value: 1.0e-12 0.0

Limits: - -

Vector: yes yes

Vector_Bounds: - -

Null_Allowed: yes yes

PARAMETER_TABLE:

Parameter_Name: table_values

Description: "lookup table values"

Data_Type: string

Default_Value: "0"

Limits: -

Vector: no

Vector_Bounds: -

Null_Allowed: no

• Description:
  The lookup table provides a way to map any arbitrary n-input, m-output combinational logic block to XSPICE. The inputs are mapped to the output using a string of length m * (2^n). The string may contain values "0", "1", "X", or "Z", corresponding to an output of low, high, unknown, or high-impedance, respectively. The outputs are only mapped for inputs which are valid logic levels. Any unknown bit in the input vector will always produce an unknown output. The character string is in groups of (2^n) characters, one group corresponding to each output pin, in order. The first character of a group in the string table_values corresponds to all inputs value zero, and the last (2^n) character in the group corresponds to all inputs value one, with the first signal in the input vector being the least significant bit. For example, a 2-input lookup table representing the function (A * B) (that is, A AND B), with input vector [A B] can be constructed with a table_values string of "0001"; function (~A * B) with input vector [A B] can be constructed with a "table_values" string of "0010". The delays associated with each output pin's rise and those associated with each output pin's fall may be specified independently. The model also posts independent input load values per input pin (in farads) based on the parameter input_load. The parameter input_delay provides a way to specify additional delay between each input pin and the output. This delay is added to the rise- or fall-time of the output. The output of this model does not respond to the total loading it sees on the output; it will always drive the output strongly with the specified delays.

Example SPICE Usage:

* LUT encoding 3-bit parity function

a4 [1 2 3] [5] lut_pty3_1

.model lut_pty3_1 d_genlut(table_values = "01101001"

+ input_load [2.0e-12])

* LUT encoding a tristate inverter function (en in out)

a2 [1 2] [3] lut_triinv_1

.model lut_triinv_1 d_genlut(table_values = "Z1Z0")

* LUT encoding a half-adder function (A B Carry Sum)

a8 [1 2] [3 4] lut_halfadd_1

.model lut_halfadd_1 d_genlut(table_values = "00010110"

+ rise_delay [ 1.5e-9 1.0e-9 ] fall_delay [ 1.5e-9 1.0e-9 ])