NAME_TABLE:

C_Function_Name: cm_memristor

Spice_Model_Name: memristor

Description: "Memristor Interface"

PORT_TABLE:

Port_Name: memris

Description: "memristor terminals"

Direction: inout

Default_Type: gd

Allowed_Types: [gd]

Vector: no

Vector_Bounds: -

Null_Allowed: no

PARAMETER_TABLE:

Parameter_Name: rmin rmax

Description: "minimum resistance" "maximum resistance"

Data_Type: real real

Default_Value: 10.0 10000.0

Limits: - -

Vector: no no

Vector_Bounds: - -

Null_Allowed: no no

PARAMETER_TABLE:

Parameter_Name: rinit vt

Description: "initial resistance" "threshold"

Data_Type: real real

Default_Value: 7000.0 0.0

Limits: - -

Vector: no no

Vector_Bounds: - -

Null_Allowed: no no

PARAMETER_TABLE:

Parameter_Name: alpha beta

Description: "model parameter 1" "model parameter 2"

Data_Type: real real

Default_Value: 0.0 1.0

Limits: - -

Vector: no no

Vector_Bounds: - -

Null_Allowed: no no

• Description:
  The memristor is a two-terminal resistor with memory, whose resistance depends on the time integral of the voltage across its terminals. rmin and rmax provide the lower and upper limits of the resistance, rinit is its starting value (no voltage applied so far). The voltage has to be above a threshold vt to become effective in changing the resistance. alpha and beta are two model parameters. The memristor code model is derived from a SPICE subcircuit published in [23].

Example SPICE Usage:

amen 1 2 memr

.model memr memristor (rmin=1k rmax=10k rinit=7k

+ alpha=0 beta=2e13 vt=1.6)