JFET level 1 model with Parker Skellern modification

The level 1 JFET model is derived from the FET model of Shichman and Hodges. The dc characteristics are defined by the parameters VTO and BETA, which determine the variation of drain current with gate voltage, LAMBDA, which determines the output conductance, and IS, the saturation current of the two gate junctions. Two ohmic resistances, RD and RS, are included.

[\begin{array}{ll} {vgst = vgs - VTO} & \ \end{array}]

[\begin{array}{ll} {\beta_{p} = BETA\left( {1 + LAMBDA vds} \right)} & \ \end{array}]

[\begin{array}{ll} {bfac = \frac{1 - B}{PB - VTO}} & \ \end{array}]

[\begin{array}{ll} {I_{Drain} = \begin{cases} {vds \cdot GMIN,} & {{if} vgst \leq 0} \ {\beta_{p} vds\left( {vds\left( {bfac vds - B} \right) vgst\left( {2B + 3bfac\left( {vgst - vds} \right)} \right)} \right) + vds \cdot GMIN,} & {{if} vgst \geq vds} \ {\beta_{p} vgst^{2}\left( {B + vgst bfac} \right) + vds \cdot GMIN,} & {{if} vgst < vds} \ \end{cases}} & \ \end{array}]

Note that in Spice3f and later, the fitting parameter B has been added by Parker and Skellern. For details, see [9]. If parameter B is set to 1 equation above simplifies to

[\begin{array}{ll} {I_{Drain} = \begin{cases} {vds \cdot GMIN,} & {{if} vgst \leq 0} \ {\beta_{p} vds\left( {2vgst - vds} \right) + vds \cdot GMIN,} & {{if} vgst \geq vds} \ {\beta_{p} vgst^{2} + vds \cdot GMIN,} & {{if} vgst < vds} \ \end{cases}} & \ \end{array}]

Charge storage is modeled by nonlinear depletion layer capacitances for both gate junctions, which vary as the (- \frac{1}{2}) power of junction voltage and are defined by the parameters CGS, CGD, and PB.

Name
Parameter
Units
Default
Example
Scaling factor
VTO
Threshold voltage VT0
V
-2.0
-2.0
BETA
Transconductance parameter (β)
$\frac{A}{V^{"}}$
1.0e-4
1.0e-3
area
LAMBDA
Channel-length modulation parameter (λ)
$\frac{1}{V}$
0
1.0e-4
RD
Drain ohmic resistance
Ω
0
100
area
RS
Source ohmic resistance
Ω
0
100
area
CGS
Zero-bias G-S junction capacitance Cgs
F
0
5pF
area
CGD
Zero-bias G-D junction capacitance Cgd
F
0
1pF
area
PB
Gate junction potential
V
1
0.6
IS
Gate saturation current IS
A
1.0e-14
1.0e-14
area
B
Doping tail parameter
-
1
1.1
KF
Flicker noise coefficient
-
0
AF
Flicker noise exponent
-
1
NLEV
Noise equation selector
-
1
3
GDSNOI
Channel noise coefficient for nlev=3
1.0
2.0
FC
Coefficient for forward-bias depletion capacitance formula
0.5
TNOM
Parameter measurement temperature
C
27
50
TCV
Threshold voltage temperature coefficient
$\frac{1}{C}$
0.0
0.1
BEX
Mobility temperature exponent
-
0.0
1.1

Additional to the standard thermal and flicker noise model an alternative thermal channel noise model is implemented and is selectable by setting NLEV parameter to 3. This follows in a correct channel thermal noise in the linear region.

[\begin{array}{ll} {S_{noise} = \frac{2}{3} 4kT \cdot BETA \cdot Vgst\frac{\left( {1 + \alpha + \alpha^{2}} \right)}{1 + \alpha}GDSNOI} & \ \end{array}]

with

[\begin{array}{ll} {\alpha = \begin{cases} {1 - \frac{vds}{vgs - VTO},} & {{if} vgs - VTO \geq vds} \ {0,} & {else} \ \end{cases}} & \ \end{array}]